FTL based 4Stage CLA Adder Design with Floating Gates

نویسندگان

  • S. Nooshabadi
  • Bardia Bozorgzadeh
  • Ehsan Zhian-Tabasy
  • Ali Afzali-Kusha
  • Sung-Mo Kang
  • John P. uyemura
چکیده

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Design of Carry Look Ahead Adder Using Sub Threshold Dual Mode Logic

Sub-threshold is a new paradigm in the digital VLSI design today. In Sub-threshold region, transistors are operated in sub-threshold voltage. This paper examine the Carry Look Ahead (CLA) Adder with dual mode logic (DML)principle, in which gates are operated in sub-threshold regime and comparison of results with Conventional basic Carry look ahead adder . The number of gates in CLA is 5 includi...

متن کامل

A Novel Domino Logic for Arithmetic Circuits

This paper presents a low power and high speed ripple carry adder circuit design using a new CMOS domino logic family called feedthrough logic. Dynamic logic circuits are important as it provides better speed and has lesser transistor requirement when compared to static CMOS logic circuits. The proposed circuit has very low dynamic power consumption and lesser delay compared to the recently pro...

متن کامل

Propose, Analysis and Simulation of an All Optical Full Adder Based on Plasmonic Waves using Metal-Insulator-Metal Waveguide Structure

This paper proposes a full adder with minimum power consumption and lowloss with a central frequency of 1550nm using plasmonic Metal-Insulator-Metal (MIM)waveguide structure and rectangular cavity resonator. This full adder operates based onXOR and AND logic gates. In this full adder, the resonant wave composition of the firstand second modes has been used and we have ob...

متن کامل

Full-Swing Gate Diffusion Input logic - Case-study of low-power CLA adder design

Full Swing Gate Diffusion Input (FS-GDI) methodology is presented. The proposed methodology is applied to a 40 nm Carry Look Ahead Adder (CLA). The CLA is implemented mainly using GDI full-swing F1 and F2 gates, which are the counterparts of standard CMOS NAND and NOR gates. A 16-bit GDI CLA was designed in a 40 nm low power TSMC process. The CLA, implemented according to the proposed methodolo...

متن کامل

Design Consideration of Dual Threshold Logic for High Performance and Ultralow Power Carry Look-Ahead Adder

This paper presents the design of high performance and ultralow power 8-bit carry-look-ahead adder circuits using two-phase modified dual-threshold voltage (dual-VT) domino logic method with the feed through logic concept. The proposed concepts are provides lower delay and dynamic power consumption; due to these two advantages it perform better in high fan-out and high switching frequencies. Th...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2017